/******************************************************************************
*
* Copyright (C) 2008-2020 Allegro DVT2.  All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* XILINX OR ALLEGRO DVT2 BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of  Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
*
* Except as contained in this notice, the name of Allegro DVT2 shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Allegro DVT2.
*
******************************************************************************/

// This file was generated by configure. DO NOT MODIFY


#ifndef AL_ENABLE_ENC_WATCHDOG
#define AL_ENABLE_ENC_WATCHDOG 0
#endif
#ifndef AVC_MAX_HORIZONTAL_RANGE_P
#define AVC_MAX_HORIZONTAL_RANGE_P 16
#endif
#ifndef AVC_MAX_VERTICAL_RANGE_P
#define AVC_MAX_VERTICAL_RANGE_P 16
#endif
#ifndef AVC_MAX_HORIZONTAL_RANGE_B
#define AVC_MAX_HORIZONTAL_RANGE_B 8
#endif
#ifndef AVC_MAX_VERTICAL_RANGE_B
#define AVC_MAX_VERTICAL_RANGE_B 8
#endif
#ifndef HEVC_MAX_HORIZONTAL_RANGE_P
#define HEVC_MAX_HORIZONTAL_RANGE_P 32
#endif
#ifndef HEVC_MAX_VERTICAL_RANGE_P
#define HEVC_MAX_VERTICAL_RANGE_P 32
#endif
#ifndef HEVC_MAX_HORIZONTAL_RANGE_B
#define HEVC_MAX_HORIZONTAL_RANGE_B 16
#endif
#ifndef HEVC_MAX_VERTICAL_RANGE_B
#define HEVC_MAX_VERTICAL_RANGE_B 16
#endif
#ifndef ENCODER_CORE_FREQUENCY
#define ENCODER_CORE_FREQUENCY 666666666
#endif
#ifndef ENCODER_CORE_FREQUENCY_MARGIN
#define ENCODER_CORE_FREQUENCY_MARGIN 10
#endif
#ifndef ENCODER_CYCLES_FOR_BLK_32X32
#define ENCODER_CYCLES_FOR_BLK_32X32 4900
#endif
#ifndef AL_ENC_NUM_CORES
#define AL_ENC_NUM_CORES 4
#endif
#ifndef AL_DEC_NUM_CORES
#define AL_DEC_NUM_CORES 2
#endif
#ifndef HW_IP_BURST_ALIGNMENT
#define HW_IP_BURST_ALIGNMENT 32
#endif
#ifndef HW_IP_BIT_DEPTH
#define HW_IP_BIT_DEPTH 10
#endif
#ifndef AL_ENC_CORE_MAX_WIDTH
#define AL_ENC_CORE_MAX_WIDTH 4096
#endif
#ifndef AL_MAX_ENC_SLICE
#define AL_MAX_ENC_SLICE 200
#endif
#ifndef MAX_NUM_LAYER
#define MAX_NUM_LAYER 1
#endif
#ifndef AL_BLK16X16_QP_TABLE
#define AL_BLK16X16_QP_TABLE 0
#endif


#define AL_CONFIGURE_COMMANDLINE "./configure --config-blob customers/Xilinx/config.ini"
#define AL_VERSION_MAJOR 0
#define AL_VERSION_MINOR 20
#define AL_VERSION_STEP 0

